SDR06 Papers and Presentations
12-16 November 2006
Orlando, Florida

Comprehensive downloads:

SDR’06 Paper and Presentation Abstracts

Session 1.1

Impact of the use of CORBA for Inter-Component Communication in SCA Based Radio
Balister, P., M. Robert, J. Reed (Virginia Tech)

One of the principal problems with SDR in general and SCA in particular is that the overhead incurred through the use of a software infrastructure is difficult to assess. This difficulty stems from the lack of reference point to which to compare this overhead. In an attempt to quantify this overhead, this paper presents the implementation of a simple radio system, in this case an FM receiver, and quantifies the overhead incurred by the use of the SCA, specifically by the use of CORBA within the context of the SCA. Results show that while this overhead is measurable, it is significantly lower than the processing required for the receiver’s signal processing task. This shows that, even when the receiver itself is fairly simple, the overhead incurred by the use of CORBA is minor.

SDR Test-Bed for Regenerative Satellite Communications
Huber, K., Lin, W. (Array Systems Computing Inc., Toronto, Ontario)

A Software Defined Radio (SDR) test-bed designed to demonstrate the regenerative capability of onboard processing for satellites was developed as a proof-of- concept system. The aim of this project was to perform an analysis of system capabilities subject to the underlying requirement that the prototype platform was composed of generic commercial off-the-shelf (COTS) hardware and software components and be compliant to the Software Communications Architecture (SCA) version 2.2. The system performs demodulation and decoding for the second generation digital video broadcasting standard for satellite (DVB-S2). The technical analysis performed was designed to demonstrate and validate the themes of interoperability and upgradeability. Performance results demonstrated the prototype’s ability to achieve these aims; however, overall system performance (such as throughput) was less than anticipated primarily due to the overhead of software overhead management issues.

A Software Defined Radio Proof-of-Concept Demonstration Platform
Zhong, S., C. Dolwin, R. Burgess (Toshiba Research Europe Limited)

This paper presents our work on a demonstration platform for a software defined radio proof-of-concept. The aim of the demonstrator is to show seamless switching between different functions of an IEEE 802.11a [1] WLAN OFDM system on an adaptive execution environment. The mechanisms and interfaces for dynamic, reliable and secure Software Defined Radio (SDR) equipment reconfiguration are investigated. The adaptive execution environment concept is evaluated on the Real-Time Research Platform (RTRP). A Functional Description Language (FDL) based on XML is used to describe functional configurations for reconfigurable equipment. The FDL XML description is interpreted by the Configuration Control Module (CCM) using Signal Processing Modules (SPM) to create a binary configuration file for the target platform. A hardware abstraction layer (HAL) for uniform access to the heterogeneous signal processing hardware is defined. Finally a WLAN OFDM system is implemented on the platform and used to demonstrate the ideas discussed.

Session 1.2

Energy-Performance Exploration of a CGA-based SDR Processor
Novo, D., B. Bougard, P. Raghavan, T. Schuster, Van der Perre, L. (IMEC, Leuven, Belgium), H. S. Kim, H.Yang (Samsung)

Software-Defined Radio (SDR) enables cost-effective multi-mode terminals. However, the growing complexity of the new communication standards together with the reduced energy budget required by battery-powered devices challenge architects. Coarse Grain Array (CGA) processors are strong candidates to undertake both high- performance and low power. In this paper, we present an extensive energy-performance exploration of a CGA-based SDR processor. We stress the importance of trading off different sources of parallelism, such as data and instruction level parallelism, to achieve the required performance at minimum energy cost. The resulting instantiation is able to execute the symbol-based base-band processing of a 108 Mbps Space Division Multiplexing (SDM) OFDM WLAN receiver with an estimated average power consumption of 110 mW in 90nm CMOS technology.

Design Considerations for Size Weight and Power (SWAP) Constrained Radios
Shanton III, L., H. Wang (Thales Communications, Inc.)

For battery powered radios, average power consumption of the radio dictates the operational life of the radio in field use. Many of these radio applications are also severely size and weight limited. Therefore, the design of both hardware and software must take into account Size, Weight, and Power (SWAP) as primary design considerations. This paper discusses best practices for hardware and software design in SWAP constrained radios. Topics covered are dynamic clock scaling, power supply scaling, modes of operation, duty cycle impact, static versus dynamic power, hardware power reduction considerations, and programmable logic versus ASIC designs. The focus is on practical design methods and trade-offs, especially for networking waveforms. Hardware only power and space saving techniques are discussed first. Waveform impact on SWAP and some software techniques for power savings are discussed. Software interaction for dynamically controlled power savings are addressed along with the requisite hardware interfaces. Software topics include impact of SDR waveforms on hardware power and space.

Architecture and Simulation of Timing Synchronization Circuits for the FPGA Implementation
Dick, C. (Xilinx Inc.), f harris (San Diego State University), Egg, B. (Xilinx Inc., San Diego State University)

This paper describes the architecture, design flow and verification process for the FPGA implementation of timing recovery circuits for QAM waveforms. We achieve sample timing alignment by phase selection of a polyphase matched filter. The challenge in realizing these circuits in hardware is not in the construction of the multirate filter architecture, but rather the complex control circuitry that marshals data from the receiver front-end processor (e.g. digital down-converter) into the timing recovery compute engine. This engine must select the correct filter path to align the output sample position with the maximum eye-opening in the face of sample clock phase and frequency offsets and drift. The design and FPGA implementation of this control plane, filter architecture, timing error detector and memory management sub-system is described, along with implementation considerations for Xilinx Virtex-4 FPGAs. A model-based FPGA design flow called System Generator, based on the Mathworks Simulink visual programming environment, was used for our implementation. The FPGA resource utilization and performance is also reported.

New Architecture for Development Platform Targeted to Portable Applications
Sathappan, R. (Texas Instruments, Inc.), M. Dumas, L. Belanger (Lyrtech), M. Uhm (Xilinx)

Performance, power consumption and cost are three critical factors developers face when designing software defined radios (SDR) for portable applications. In an attempt to satisfy these requirements, SDR developers consistently struggle to choose from the array of hardware and software products currently on the market. As a result, they often end up with components from multiple, independent vendors which greatly complicates waveform porting and system integration.

Session 1.3

FPGA-Based Single Chip Cryptographic Solution
McLean, M. (National Security Agency, Fort Meade, MD); Moore, J. (Xilinx Corporation, Albuquerque, NM)

The use of Field Programmable Gate Arrays (FPGAs) in Type I Cryptographic equipment has historically been limited. While FPGA use is allowed, restrictions on how they are used can result in inefficient processing and an increase in system size, weight and power. For example, redundancy and isolation of functionality is required through physically separate devices. This paper introduces new technology that will provide the industry with an FPGA-based single chip cryptographic solution. The National Security Agency (NSA) and Xilinx have been working together to bring the advantages of FPGA technology to the High Assurance industry. Utilizing the Xilinx Virtex-4 FPGA, the NSA and Xilinx have developed a design flow and verification process based on NSA requirements for high-grade cryptographic processing. This paper will outline the design flow process and summarize the results of the evaluation effort.

Trends in Low Power Handset Software Defined Radios
Raja, T., J. Glossner (Sandbridge Technologies, White Plains, NY)

Most SDR designs are concentrating on product implementations for BTS, RF front ends (both for handsets and BTS) and military applications. Relatively few are working on the development of commercial technologies which enable SDR Tier 2 level programmability (e.g. complete physical layer implementations in software). Technical challenges for low power handset SDR implementations include: programmability, power consumption, and cost (size). These are significant technological barriers to overcome, especially since the need for higher data rates, increasing implementation complexity of communication systems (OFDM, MIMO, etc) continues to grow. In addition, mobile terminal development cycles can be long and unpredictable.

Sampling Frequency Selection Scheme for a Multiple Signal Receiver Using Undersampling
Kunisawa, Y. (KDDI R&D Laboratories, Yokosuka, Kanagawa, Japan)

A multi-mode terminal is required in order to offer users multiple communication services for ubiquitous communication and Software Defined Radio (SDR) technology has attracted considerable attention as a means of realizing a multi-mode terminal. In such a terminal, a multi-band receiver is required, since each communication service uses an individually specific frequency and bandwidth. It is also desirable to be able to utilize multiple communication services simultaneously at multi-mode terminals in order to offer various applications. Undersampling is a potential method allowing multi-band and multiple signals to be simultaneously received by selecting a suitable sampling frequency. An undersampling technique that can lower the sampling frequency for receiving two signals, compared with the conventional method has been proposed [1]. This paper presents a novel sampling frequency selection scheme, which improves the BER (Bit Error Rate) characteristics further at a multiple signal receiver using undersampling.

Ultra Low Phase Noise DDS
harris,f. (San Diego State University), C. Dick (Xilinx Corp.), R. Jakel (Cubic Corp.)

Direct Digital Synthesizers traditionally use a phase accumulator and a phase-to-amplitude conversion mechanism to form complex samples of arbitrary frequency sinusoids. The CORDIC [1] algorithm is the most common phase-to-amplitude conversion processes. To obtain low levels of phase noise with a small number of iterations the DDS often employs a two pass algorithm in which the complex samples formed from high order phase bits are corrected by post processing with terms derived from low order phase bits. This paper presents a modified version of the CORDIC based DDS that suppresses the amplitude noise generated by the second pass phase correction. We then show that the amplitude noise suppression is equivalent to an embedded AGC. We then recast the second order normal recursive filter as a recursive version of the CORDIC and insert the equivalent AGC to stabilize the loop against finite arithmetic and signal growth due to the CORDIC. We show this to be a very interesting variation of the DDS.

Session 1.4

Low Power Software Defined Radio Design Using FPGAs
Jenkins, C., P. Ekas (Altera Corporation San Jose, California)

Software-defined radios (SDR) are emerging as a key communication component in the military market. Historically, FPGAs have been used to perform IF up/down conversion and signal processing tasks for SDR. The capabilities of today’s 65-nm FPGAs, with higher performance and more logic density coupled with embedded processors, can now absorb the digital signal processing (DSP) baseband as well as some general- purpose CPU (GPP) functionality, providing a smaller, lower power solution. However, the latest generation of 65-nm FPGAs must manage increased process technology issues concerning power. Three types of power consumption (static, dynamic, and interface) need to be considered when designing SDR systems. This paper examines several aspects for reducing power in SDR designs including integration benefits of today’s FPGAs, use of tools to evaluate and optimize FPGA power based on specifications, and preview new methods/features in 65-nm technology for power management and programmability.

Using C to Hardware Acceleration in FPGAs for Waveform Baseband Processing
Lau, D., J. Blackburn, C. Jenkins (Altera Corporation, San Jose, CA)

Software-defined radio (SDR) architectures typically include general-purpose CPUs (GPPs), digital signal processing (DSP) ASSPs and FPGAs that process different waveforms, functions, and algorithms. GPPs typically handle network protocol processing and management functions. Historically, DSPs handled transceiver baseband processing and encoding, while FPGAs provided high- performance IF up/down conversion and preconditioning functions. Now FPGAs, when used with embedded soft- core processors, have absorbed the DSP baseband processing and some GPP functionality as well, providing a smaller, lower power solution. However, meeting the baseband performance requirements requires aggressive use of hardware acceleration. In this paper, we discuss an efficient methodology for hardware acceleration of SDR waveforms, the creation and use of hardware acceleration units, and a tool that automates the flow. The Altera® Nios® II C-to-Hardware (C2H)Acceleration Compiler is a coprocessor generation tool that converts performance-critical ANSI C functions into hardware accelerator modules with direct memory access. Results are presented showing performance gains of 13–73X over software only, offering a promising solution for rapid development of high-performance SDR systems.

Military Anti-Tampering Solutions Using Programmable Logic
Jenkins, C., C. Plante (Altera, San Jose, California)

Military applications are becoming increasingly complex. Major programs such as Future Combat Systems (FCS), Joint Strike Fighter F-35 (JSF), and the Joint Tactical Radio System (JTRS) are pushing technological capabilities to their limits. Due to the technology requirements and environments to which they are exposed, these military systems rely on programmable logic (FPGAs) to provide extreme flexibility plus protection from tampering. As FPGAs become an integral part of leading-edge architectural design replacing ASICs and ASSPs, the security of the FPGA design and configuration bitstream is of utmost importance. This paper describes two techniques—configuration bitstream encryption and handshaking tokens—for securing designers’ intellectual property (IP) within SRAM-based FPGAs.

Session 1.5

Medium Term Evolution for Reconfigurable RF Transceivers
Maurer, L. (DICE Danube Integrated Circuit Engineering AG, Linz, Austria); T. Dellsperger (Advanced Circuit Pursuit AG, Zollikon, Switzerland); T. Burger (Integrated Systems Laboratory, ETH Zurich, Switzerland); Nussbaum, D., Knopp, R.; Callewaert, H. (Institut Eurecom, B.P., Sophia Antipolis, France)

This paper presents approaches to reconfigurable RF transceivers that are pursued in the EU IST project e2R. This work can be divided into two parts. On the one hand, specific work on the architecture and building blocks for highly reconfigurable RF transceivers. On the other hand, the concrete design and implementation of a prototype RF transceiver. Concerning the first part, the work is focused on an advancement of the well-known direct conversion receiver and transmitter. In the proposed solution, digital signal processing functions are incorporated directly into the RF ICs to increase its flexibility. A key enabler for this architecture change is the step towards CMOS technologies for RF ICs. Concerning the prototyping activity, the key features of the targeted prototype are presented.

An Efficient UE Modem Platform Architecture for 3GPP LTE
Jeong, C., M. S. Lee, Y. Kim, S. Bang (Mobile Transmission Technology Research Group, Electronics and Telecommunications Research Institute, Daejeon, Korea)

Recently, a high­data­rate, low­latency and packet­optimized radio­access technology has been intensively studied in 3GPP Long­Term Evolution (LTE) standard group. The 3GPP LTE system should support instantaneous downlink and uplink peak data rates of 100Mb/s and 50Mb/s within 20 MHz downlink and uplink spectrum allocations, respectively. In this paper, we propose an efficient UE modem platform architecture which considers the trends and necessary conditions in the 3GPP LTE specifications. Based on the proposed structure, a hardware platform is implemented. The experimental results demonstrate that the developed platform is able to be used as 3GPP LTE UE modem.

Emulators Based Environment for HW/SW Partitioning
Halimic, M., A. Al-Adnani, Y. Harada (Panasonic Broadband Communications Development Laboratory, Wokingham, Berkshire, United Kingdom), D. Arvind, J. Mann (University of Edinburgh, Edinburgh, United Kingdom)

This paper describes two parts of the environment termed a Partitioner. The Partitioner is utilised for partitioning a functional designs (software modules) onto heterogeneous hardware platforms. In this study the heterogeneous platform is presented by three different commercially available development environments representing a RISC processor, DSP and FPGA. The Partitioner is designed to take a set of basic code modules and in the process of reconfiguring an SDR based terminal find a partitioning (assignment to different processing units) and schedule for these modules that will optimised the performance of the unit. Parts of the Partitioner presented here are a Threading analyser, which analyses the threadability of a module of non-threaded code and a tool that performs analysis of the power consumption on each of the available platforms.

Carrier per Carrier Analysis of SDR Signals Creast Factor
Moy, C., Zabre, S., Louet, Y., Palicot, J. (IETR/Supelec-SCEE Laboratory, Campus of Rennes), Lereau, C. (France Telecom RD-TECH-GRE)

SDR technology proposes very promising solutions to the issue of multi-standard systems design.  SDR signals have the particularity to be made of the combination of either several standards and/or different carriers in a single standard at separate frequencies, what implies high temporal fluctuations of the signal.  Thus analog non linear elements (such as amplifiers and converters), combined with these high variations, provoke distortions of the signal and consequently a decrease of the system performances (in and out of band distortion, degraded bit-error-rate, etc.).  This phenomenon, well known as the PAPR (Peak-to-Average Power Ratio) or simply Power Ratio (PR), is usually addressed in the time domain.  This paper proposes a PR frequency approach, which is more adequate to the SDR signal context.  By showing the equivalence between the time and frequency approaches for an OFDM signal, we conclude of the interest of studying the PR in the frequency domain, i.e. carrier per carrier, for SDR applications.

Development of and Initial Performance Results for a Software Defined Ultra Wideband Rec
Anderson,C. R., J. H. Reed (Mobile and Portable Radio Research Group Wireless at Virginia Tech)

The vast majority of today’s Ultra Wideband (UWB) communication systems are composed of application specific hardware, and do not use SDR architectures. Several major challenges are involved in developing a UWB testbed—extremely high sampling rates, huge amounts of input/output data, tremendous amount of digital processing power, and developing broadband RF hardware. These challenges are particularly daunting when Commercially available Off-The-Shelf (COTS) components are used in the development of such a system. In this paper, we describe the development of a UWB SDR Transceiver Testbed based around an 8 GHz-8 ADC Time Interleaved Sampling array and a VirtexII-Pro FPGA. One of the primary issues with the Time Interleaved Sampling array is distortion introduced into the received signal as a result of ADC mismatches. Therefore, the paper also presents initial performance results for both narrowband and ultra wideband signals and indicate that acceptable system performance can be obtained even if the ADCs are only coarsely matched.

Session 1.6

Moore or Less? A Critical Comparison of Bandwidth vs. Resolution
Egg, B. (Cubic Defense Applications & SDSU, San Diego, CA), f. harris (San Diego State University, San Diego, CA), C. Dick (Xilinx, Inc., San Jose, CA)

Moore’s law is evident in the fantastic success of the microprocessor, the variety of inexpensive RF devices, and wide range of tiny radios and phones now available. On the other hand, mixed signal devices, like data converters seem to have fallen behind the Moore-like growth of their semiconductor counterparts. An analysis of data converter performance, considering both bandwidth and resolution, indicates radio architectures are historically uncorrelated with data converters of the same time period. Data converters, which are generally fabricated from two distinct semiconductor materials, diverge from Moore’s law; however, we illustrate a clear connection between particular engineering personalities and data converter trends. Two generational and professional engineering styles are discussed as b-type and r-type personalities—bandwidth and resolution. Bandwidth and resolution are controllable variables from a semiconductor fabrication stance, and bound a link’s theoretical information capacity—Shannon’s theory. Analog-to-digital and digital-to-analog converters (ADC and DAC, respectively) are judged by bits of resolution and sample rate. Taken individually, digital logic and analog RF have experienced exceptional growth, but together have underperformed. The performance predictions of Moore’s law state that the density of transistors in an integrated circuit doubles every 18 months, which inversely relates to speeds; however, data converters haven’t adhered to that log-linear performance—converters appears uncorrelated at first glance. Recent developments in parallel signal processing devices, such as the Virtex series FPGA from Xilinx, have stimulated the converter market to make up for lost time, but stylistic preferences are strong. A generational and occupational model reveals allegiances on both sides of the resolution-bandwidth divide. Ultimately, we clarify and define these biases, reveal their roots, and confirm their impact.

Implementation of a Triple-Mode SDR Handset Modem
Han, Y., T. Oh, S. Choi (HY-SDR Research Center, Hanyang University, Seoul, Korea)

In this paper, we present a Software Defined Radio (SDR) handset modem which supports cdma2000, Time Division Duplex High-Speed Downlink Packet Access (TDD HSDPA), and Wireless Broadband Portable Internet (WiBro). The proposed modem employs digital signal processors (DSPs), field programmable gate arrays (FPGAs), and microprocessors, so that the various communication functions of cdma2000, HSDPA and WiBro can be programmed by software downloaded onto the hardware platform. The proposed handset modem comprises several blocks that are interfaced through protocols such as low voltage differential signaling (LVDS), external memory interface (EMIF), and multi-channel buffered serial port (McBSP). The proposed SDR handset modem is used for the physical layer of the mobile communication system network. We first describe the structure of the cdma2000, HSDPA, and WiBro systems. Then, the mapping of the modem functions onto the available processing resources is detailed for each SDR mode. Finally, the performance of the proposed SDR handset modem is demonstrated based on internal loopback tests with the test vectors.

Implementation of a Digital IF Transceiver for SDR-based WiMAX Base Station
Yu, B. G., J.U. Kim (Electronics and Telecommunications Research Institute(ETRI), Daejeon, Korea), S.W. Ra (Chung Nam National University, Daejeon, Korea)

This paper presents the implementation and performance of a Software Defined Radio (SDR) technology-based- Digital Intermediate Frequency (IF) transceiver for IEEE 802.16d standard, often referred to as a WiMAX (Worldwide Interoperability for Microwave Access) base station. The implemented Digital IF transceiver is reconfigurable to three bandwidth profiles : 1.75MHz, 3.5MHz, and 7MHz each incorporating the IEEE 802.16d WiMAX standard. This transceiver can be reconfigured to other WiMAX profiles through software downloaded onto identical hardware platforms, without changing any components or parts on board. Experimental results are presented that show the performance of the designed Digital IF transceiver using an undersampling scheme, which is closely related to the sampling clock jitter characteristics. The experimental results show that the Error Vector Magnitude (EVM) value of the downlink IF output signal for Clock I, with a phase noise of -91.1 dBc/Hz decreased by 13.7 dB more than that of Clock III, with a phase noise of -118 dBc/Hz, the result being unrelated to the WiMAX profile that was operating.

Implementation of a Dual Mode SDR Smart Antenna Base Station Supporting WiBro and HSDPA
Kim, J., S. Mun, N. Ryu, S. Choi (HY-SDR Research Center, Hanyang University, Seoul, Korea)

In this paper, we describe the implementation and performance of a dual-mode Software Define Radio (SDR) smart antenna base station system. SDR technology enables a communication system to be reconfigured through software downloads to the flexible hardware platform that is implemented using programmable devices such as Digital Signal Processors (DSPs), Field Programmable Gate Arrays (FPGAs), and microprocessors. The presented base station channel card comprises the physical layer (PHY) including the baseband modem as well as the beamforming module. This channel card is designed to support TDD High-Speed Downlink Packet Access (HSDPA) as well as Wireless Broadband Portable Internet (WiBro) utilizing the SDR technology. We first describe the operations and functions required in WiBro and TDD HSDPA. Then, we explain the channel card design procedure and hardware implementation. Finally, we evaluate WiBro and TDD HSDPA performance by simulation and actual channel-card-based processing. Our smart antenna base-station dual-mode channel card shows flexibility and tremendous performance gains in terms of communication capacity and cell coverage.

New FPGAs Boost Software Defined Radio Performance
Hosking, R. (Pentek, Inc., Upper Saddle River, NJ)

With the advent of software defined radio platforms in military aerospace and now more recently in some consumer radio and electronics segments, the usefulness of field programmable logic (FPGAs) as reprogrammable digital signal processing (DSP) engines for SDR is taking on increased importance. With recent advances in chip technology, not only is the silicon much faster and denser, but the fundamental role of the FPGA is changing dramatically. Indeed, DSP capability has become one of the most significant assets of the FPGA, as evidenced by sharp increases in engineering and marketing investments in this technology on the part of FPGA vendors over the last few years. This paper discusses how FPGA technologies are being exploited in next generation COTS real-time software radio systems. Comparisons of various families of Xilinx FPGAs include details on specific features and important tradeoffs in performance, power consumption, signal integrity, serial interfaces, memory, speed and more. A real-life FPGA-based software radio transceiver system example is also presented. This paper will aid engineers in selecting the most appropriate FPGA to meet their software radio application needs.

Session 2.1

A Novel Interpolated Tree Orthogonal Multiplexing (ITOM) Scheme with Compact Time-Frequency
harris, f. (San Diego State University), E. Kjeldsen (Scientific Research Corporation)

A cascade of half-band filters form a branching tree whose branch responses constitute an orthogonal set of wave-shapes that enable multi-channel modulation. The filters and architecture in this process, also known as a wavelet trans- form, perform the dual tasks of shaping and interpolating. A variant of this process, called Interpolated Tree Orthogonal Multiplexing (ITOM), has a tree structure that interpolates sequences formed and shaped external to the tree. The branch responses of this tree also constitute an orthogonal set of wave-shapes that enable multi-channel modulation. The unique attribute of this signal set is their spectra have compact support spanning contiguous spectral regions. This permits us to vacate spectral intervals in the modulation process to bracket occupied spectral regions when scavenging spectrum. The signal set also shares a wavelet transform attribute in that data signals of different bandwidth can be mixed by entering the tree at different branch levels. We introduce ITOM and compare pertinent features with the Wavelet transform and the polyphase filter bank.  

Pulse-Shape Filter Design in Digital Modems Employing CIC Filter
Talbot, S., B. Farhang-Boroujeny (University of Utah: Salt Lake City, Utah)

Cascaded integrator-comb (CIC) filters are frequently used in software radio modems as interpolation and decimation filters. However, CIC filters are known to exhibit passband droop and thus introduce inter-symbol interference (ISI). Many methods have been proposed in order to improve the passband characteristics of CIC filters. These methods usually increase hardware complexity in the modem. An alternative approach is to achieve the Nyquist (M) property and eliminate ISI by modifying the pulse-shaping filter (PSF) coefficients. Previously, PSF coefficients have been found through linear programming. However, linear programming is not necessarily the simplest or the best method in finding the filter coefficients. Recently a simple iterative least-squares algorithm has been proposed for Nyquist (M) filter design. We extend this method for use in a modem using CIC filters for interpolation and decimation. This method may also be used if additional filtering is required, or if other types of interpolation or decimation filters are used. When compared to the best published work, the proposed design method produces a PSF that when used in cascade with the CIC filters yields superior results in minimizing passband ripple, increasing stopband attenuation, and reducing ISI.

A Universal Square Root Nyquist (M) Filter Design for Digital Communication Systems
Farhang-Boroujeny, B. (University of Utah: Salt Lake City, Utah)

Designing transmit and receive filters that are matched together and their combination satisfy the Nyquist condition is a classical problem in digital communication systems. In this paper, we propose a novel method for designing such filters. The proposed method is based on a universal cost function whose minimization leads to designs that can strike a balance between the stopband attenuation, the residual intersymbol interference (ISI), robust sensitivity to timing jitter and/or reduced peak-to-average power ratio (PAR). An iterative algorithm for finding the global minimum of the proposed cost function is suggested and its excellent performance is shown by presenting variety of design examples.

Signaling Efficiency In OFDM Based Overlay Systems
Berthold, U., F. Jondral (Institut für Nachrichtentechnik, Universität Karlsruhe (TH), Germany)

Looking at today’s frequency plans given by the regulatory bodies, it is obvious that there are nearly no unassigned frequency bands available any more which are appropriate for mobile communications. On the other hand, when taking a closer look at the real spectrum allocation, e.g. by taking measurements, one will see that the spectrum is not used very efficiently. This discrepancy results from the static frequency assignment to dedicated licensees, not regarding their current communication demand. To overcome this “virtual” frequency shortage, one approach is to operate a secondary system as an overlay system in the same frequency band that has originally been assigned to a primary licensed system.

Simultaneous Baseband Processing Considerations in a Multi-Mode Handset Using the Sandblast
Baheshti, B., S. Jintukar (Sandbridge Technologies)

The Sandbridge SB3011 baseband processor is a SoC containing four C programmable Sandblaster™ DSP processors, and all peripherals necessary to provide a single chip baseband/multimedia and application processing solution for SDR based handsets. This SoC uniquely provides 4 simultaneous digital I/Q DMA channels to the RF front end, allowing for simultaneous multi-mode baseband processing from multiple RF front ends. This paper discusses techniques and considerations in the software development to allow for a short design cycle for implementation of such multi-mode systems. Software partitioning considerations, multi-threading the application to take advantage of the multi-threaded architecture of the baseband processor, double buffering and pipelining, as well as parallel DMA processing are discussed. Concurrency matrix development for evaluation of simultaneous modes is also described.

Session 2.2

Direct Sequence Spread Spectrum Communications System with Sampling Rate Selection Diversit
Suzuki, Y., A. Bostamam, M. Inamori, Y. Sanada (Dept. of Electronics and Electrical Engineering, Keio University)

In this paper, sampling rate selection diversity (SRSD) scheme for Direct-Sequence / Spread-Spectrum (DS/SS) is proposed. In DS/SS communication systems, oversampling may be employed to increase the signal-to-noise ratio (SNR). However, oversampling enlarges the power consumption because signal processing of the receiver has to be carried out with higher clock. Higher sampling rate does not always maximize the SNR. In the proposed SRSD scheme, the power consumption can be reduced by selecting the optimum sampling rate depending on the characteristics of the channel. The proposed SRSD scheme can also reduce the BER more than the conventional oversampling scheme under the certain channel conditions.

Design and Implementation of an Algorithm for Modulation Identification of Analog and Digi
Chen, J., R. Morelos-Zaragoza (Department of Electrical Engineering, San José State University, San José, California)

In the application of a software radio system, the design of a dynamic transceiver needs to take into account adaptation to various types of incoming signals in an unknown environment. An algorithm is developed as part of this design to appropriately identify the signal’s modulation type. The key feature of the proposed algorithm is in the use of a wavelet transform to explore different features of the received signal such as power spectral density, variance, and the amplitude and peaks of the wavelet transform of the signal. As a result, it is possible to successfully classify an incoming signal to have an analog modulation type of AM or FM, or a digital modulation type such as M-PSK, M-FSK or M-QAM. With knowledge of the modulation type of the incoming signal, the transceiver is able to choose the appropriate demodulation software algorithm in order to retrieve the transmitted information. To improve upon the performance of the algorithms at relatively high signal-to-noise ratio (SNR) values, the signal samples are further processed using a robust identification technique based on the a-posteriori probability density function.

GSM/GPRS Physical Layer on Sandblaster DSP
Kalavai, R., M. Senthilvelan, S. Agrawal, S. Jinturkar, J. Glossner (Sandbridge Technologies, White Plains, NY)

Handsets are converging to multimedia multi-protocol systems with multimedia and communications systems. Sandbridge Technologies has developed the multithreaded Sandblaster DSP core for such convergent devices. This paper presents different approaches to the implementation of GSM/GPRS physical layer on the Sandblaster DSP. Testing of real time performance with a commercial RF front-end is also presented.

Session 2.3

CORBA/e, New CORBA Profiles for SDR
Giddings, V. (Objective Interface Systems, Herndon, VA)

This paper will present the rationale behind CORBA/e and how it replaces Minimum CORBA for SDR development. It will also review the technical standards of each CORBA/e profile and discuss how each profile applies to developing SCA-based radios. The JTRS JPEO has indicated its desire to use CORBA/e to replace Minimum CORBA for the next version of the SCA. The CORBA/e (CORBA for embedded) profiles were driven by user demand for smaller size and greater speed and performance, especially in the defense and telecommunications industries. CORBA/e starts with assumptions derived from experience in the pathfinding SDR developments:

  • Resources are not infinite. In fact, they may be very constrained.
  • Features are needed to propagate priorities across the network and deal with networked resources consistently.
  • Network priorities must be managed in real-time, respecting scheduling, deadlines, priorities, etc.
  • Changes to one system should not require re-writing code for all systems on the network.

A Low Power Signal Detection and Pre-Synchronization Engine for Energy Aware Software Defin
Bougard, B., Hollevoet, L., Naessens, F., Schuster, T., Ho, C., VanDerPerre, L. (IMEC, Leuven, Belgium)

SDR enables cost-effective multi-mode terminals but still suffers from significant energy penalty when compared to dedicated hardware solutions. At system level, this energy bottleneck can be leveraged by capitalizing on the oppor- tunistic partitioning and energy-scalable design of both hardware and software architectures. This yields MPSOC platforms where specific engines are dedicated to classes of functions that relate in their computation characteristics and in their duty cycle. In case of burst-based signal recep- tion, detection functions have high duty cycle and hence need ultra low power implementation. Besides, signal syn- chronization as close as possible to the ADC is desired to free the system bus of signal-less data samples, with direct impact on the system performance and energy. A specific, still programmable ultra low power detection and pre-synchronization engine targeted to IEEE802.11a/g/n and IEEE802.16e signals is designed in 90nm CMOS. Results show that detectability is guaranteed with a minimal standby power of 1.1 mW, valid signal detection and pre- synchronization consumes 228nJ while false trigger by a blocker account for 300nJ.

SPEX: A Programming Language for Software Defined Radio
Lin, Y., R. Mullenix, S. Seo, H. Lee, S. Mahlke, T. Mudge, (Advanced Computer Architecture Laboratory, University of Michigan - Ann Arbor, MI); Reid, K. Flautner (ARM, Ltd. Cambridge, United Kingdom)

High-throughput, low-power Software Defined Radio(SDR) solutions require multi-core SIMD DSP processors to meet real-time performance requirements. Given the difficulty in programming traditional DSPs, these new multi-core signal processors provide even greater challenges for programmers and compilers. In this paper, we describe SPEX, a programming language which is aimed at narrowing the semantic gap between the description of complex SDR systems and their implementations. SPEX supports three different types of programming semantics, allowing SDR solutions to be developed with a divide-and-conquer approach. For DSP algorithm kernels, SPEX is able to support DSP arithmetics and first-class vector and matrix variables with sequential language semantics. From wireless protocol channels, it is able to support sequences of data-processing computations with dataflow language semantics. And for protocol systems, it is able to support real-time deadlines and concurrent executions with synchronous language semantics. The design choices are motivated by our experience implementing W-CDMA protocol on a reprogrammable substrate. In the paper, we also briefly explain SPEX’s compilation strategies.

Implementing a GPS Waveform under the Software Communication Architecture
Brown, A., Stricklan, L., Babich, D. (NAVSYS Corporation, Colorado Springs, Colorado)

SCA governs the structure and operation of software defined radios, enabling programmable radios to load waveforms, run applications, and network into an integrated system. Adherence to standards detailed in the SCA definition document allows hardware and software designers to know what equipment and programs to design. The SCA Hardware (HW) Framework tells the designer what minimum design specifications must be met by hardware devices. These specifications assure software written to the SCA guidance will run on SCA compliant hardware. Similar software specifications are provided for software applications. The core framework provides an abstraction layer between the waveform application and the software defined radio, enabling application porting to multiple vendors SDR products. NAVSYS is engaged in creating an SCA compliant prototype for an embedded Global Positioning System (GPS) waveform in a software defined radio. The intent is to optimize GPS services by providing position and time as an embedded waveform within a Software Defined Radio rather than requiring additional GPS chip sets. This paper will cover the design of the GPS devices and prototype software defined radio (PowerPC processor and Xilinx FPGAs) used to implement and test the GPS waveform under the SCA. This application necessitates the ability to switch tasking and adjust to various mission types within the radio framework. Test results are included showing the ability to run the GPS waveform under the SCA and demonstrating the GPS waveform with performance in tracking the GPS satellites.

Transmit Diversity Enhancement for Tactical Wireless Networking Using Multi-Carrier Distrib
Anderson, K., J. Kleider, (General Dynamics C4 Systems, Scottsdale, AZ); T. Wang, G. Giannakis (U. of Minnesota, Minneapolis, MN)

The size of handheld radios and sensors are continually shrinking, making multiple antenna scenarios difficult. Generating independent channels with tightly spaced, co located antennae can also be challenging for small form factor radios. But with increasing miniaturization, SDR’s are more intelligent, flexible and adaptive due to their nature of being software defined. By taking advantage of the increasing complexity of these nodes with their superior networking and cognitive applications, organizing multiple, single antenna nodes in a cooperative way one can achieve significant spatial separation and realize full diversity gains, significantly enhancing data throughput capacity. This paper studies a 2-user, Alamouti like, cooperative networking scheme by using a distributed space frequency diversity coding scheme for a multi-carrier (OFDM) waveform. Improved diversity order is shown using simulation and confirmed with demonstrations of over-the-air communications performed on a hardware test bed, illustrating that full space-frequency diversity is achievable. To further enhance performance robustness in multipath fading channels, coherent techniques are used on reception.

Session 2.4

Software Defined Radio Solutions "Taking JTRS to the Field" with Current and Future
Turner, M. (Harris Corporation, Rochester, New York)

Despite encountering some significant programmatic and technical issues, the Joint Tactical Radio System (JTRS) Program continues to be a key U.S. DoD transformational program. The JTRS Program is intended to provide foundational support for the U.S. DoD objective of information superiority on the battlefield, meeting the growing demand of War-fighters’ communications needs. The transformational efforts of DoD’s architecture depends on the information infrastructure called the Global Information Grid (GIG). Without a capability like JTRS, the GIG’s transformational networking would halt at the command center level, unable to extend to actual War-fighters (the so-called last tactical mile). JTRS remains a significant force in the evolution of military Software Defined Radio (SDR) solutions and associated technology.  

Design and Implementation of an SCA Core Framework for a DSP Platform
Aguayo Gonzalez, C., J. Reed, (MPRG, Wireless@Virginia Tech, Blacksburg, VA); Portelinha, F.M. (Universidade Federal de Itajuba, Itajuba, MG, Brazil)

The Software Commuications Architecture (SCA) was developed to improve software reuse and interoperability in Software Defined Radios (SDR). However, there have been performance concerns since its conception. Arguably, the majority of the problems and inneficiencies associated with the SCA can be attributed to the assumption of modular distributed platforms relying on General Purpose Processors (GPPs) to perform all signal processing. Significant improvements in cost and power consumption can be obtained by utilizing specialized, more efficient platforms. Digital Signal Processors (DSPs) present such a platform and have been widely used in the communications industry. Improvements in development tools and middleware technology opened the possibility of fully integrating DSPs into the SCA. This approach takes advantage of the exceptional power, cost, and performance characteristics of DSPs, while still enjoying the flexibility and portability of the SCA. This paper presents the design and implementation of an SCA Core Framework (CF) for a TI TMS320C6416 DSP. The framework is deployed on a Lyrtech Quad-SignalMaster C6416 board. The SCA CF is implemented by leveraging OSSIE, an open-source implementation of the SCA, to sup- port the DSP platform. Prismtech’s e*ORB and DSP/BIOS are used as the middleware and operating system, respec- tively. A sample waveform was developed to demonstrate the framework’s functionality. Benchmark results for the framework and sample applications are provided.

Automated Waveform Partitioning and Optimization for SCA Waveforms
Neel, J., Reed, J.H., Gonzales, C.A. (Mobile and Portable Radio Research Group, Wireless @ Virginia Tech, Blacksburg, VA)

Waveform partitioning – the process of assigning waveform components to processors – is a key step in the design of waveforms for implementation on multi-processor systems. For software radios employing processor pooling, waveform partitioning is a recurring task which needs to be performed in near real-time to support the run-time addition and removal of waveforms. This paper presents three different algorithms for automating the waveform partitioning process, compares the performance of these algorithms, and describes how partitioning algorithms can be incorporated into an SCA-compliant software radio. Details are given on how these partitioning algorithms are being integrated into OSSIE – the open source SCA implementation for embedded systems hosted by Virginia Tech.

Session 2.5

Fizzware - A HAL Approach Applied to SCA
Mourikas, G., Lund, D., Honary, B. (Lancaster University, Communication Department)

Software Communication Architecture (SCA) is a vital part of the Software Defined Radio (SDR) with the right initiative to evolve the compatibility and upgradeability of a SDR radio system. Fizzware was developed primarily for a reconfigurable system which required fast and partial reconfiguration. This paper describes the integration of Fizzware functionality to the existing SCA architecture. The result from the integration will allow SCA to provide services to the System Integrator, Network Integrator and therefore to the Communicator in the area of fine-grain reconfiguration. With this integration, the SCA architecture can use this embedding for current and future reconfigurable devices. This paper describes SCA and Fizzware and the architectural benefits that this merger of mechanisms can potentially benefit real time reconfigured SDR systems.

Component-Based Support for FPGA and DSP
Hermeling, M. (Zeligsoft, Gatineau, QC, Canada)

Until now, Software Defined Radio (SDR) standards have focused on General Purpose Processors. Integration with DSP and FPGA processors has been done mostly manually and in a non-systematic manner. This is about to change with different standards for DSP and FPGA integration being proposed. This paper provides a high-level introduction of the various standards and highlights the differences between them. The paper focuses on the standards from a tooling and automation viewpoint.

Making FPGAs “First Class” SCA Citizens
Humcke, F. (Hardware Director SDR Products, PrismTech Corp., Burlington, Mass)

In recent years, Software Defined Radio (SDR) developers using the Software Communications Architecture (SCA) have been making a steady march towards the antenna of the software defined radio. The next obstacle for the SCA to cross lies in the interface between embedded processors and FPGAs. Previous attempts to solve this problem have resulted in awkward and non SCA-compliant Hardware Abstraction Layers (HALs) that have only added latency, decreased portability and lowered reuse of the SDR processing elements residing in the FPGAs. The result is that FPGAs are “second class” citizens who do not contribute to the cost lowering business model of the SCA. This paper will discuss an Integrated Circuit Orb (ICO) that supports a drop-in SCA compatible interface between distributed software objects running on processors and waveform objects residing in silicon. Using techniques discussed in this paper, the connection between Software and Hardware clients and servant is made seamless, fast and uses fewer system resources. It will be shown that waveform designers can use ICO to make their FPGA designs first class SCA citizens without the time consuming task of becoming experts in the minutia of the SCA specification.

Implementing SCA Components on FPGAs
Noseworthy, J., Kulp, J. (Mercury Computer Systems, Inc., Chelmsford, MA)

The design complexity of modern day field programmable gate array (FPGA) systems is increasing as system designers are forced to integrate more FPGA devices into a single system in hopes of meeting the demands of today’s computationally intensive applications. The problem is further worsened by applications such as software defined radios that not only demand high levels of performance, but also high degrees of portability and reconfigurability. Satisfying these requirements, while still maintaining a reasonable time to market makes full custom designs for FPGAs nearly impossible. One technique to alleviate a significant percentage of these burdens is to design intellectual property (IP) cores to conform to specific interfaces that can be parameterized to suite the particular needs of the IP core. Our experiences show that a large percentage of core communication patterns can occur through a select number of interfaces provided that the interfaces have customizable attributes that allow them to be made specific to a particular application. This technique eases design complexity since designers no longer spend time learning interfaces specific to a single core. Furthermore, if such guidelines are followed, the connection of cores instantly becomes a well understood problem that yields a finite number of efficient solutions. Change Proposal 289 (CP289) addresses these issues by specifying three profiles to describe the various types of component communications. In this paper we describe the CP289 specification and how using the three profiles can facilitate the design of CP289 systems. The concepts presented are in no way specific to CP289 and can easily be extended to incorporate other FPGA component models.

Session 2.6

Next Generation SCA Operating Environments
Bickle, J. (Chief Scientist SDR Products of PrismTech Corp., Burlington, Mass)

Joint Tactical Radio System (JTRS) Software Communications Architectures (SCA) implementations have been branded by many as being slow or large because of the underlying use of technologies such as the Common Object Request Broken Architecture (CORBA) and the eXtensible Markup Language (XML). Some of this branding has also occurred because of CORBA’s initial usage in enterprise systems using TCP/IP. However today’s embedded CORBA middleware, designed and standardized for use in real-time, resource constrained, distributed systems makes the building of small and fast SCA implementations viable across General Purpose Processors (GPPs), Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGAs). The paper begins with a brief discussion about SCA perceptions and technologies that offset these perceptions. The paper additionally discusses SCA distributive communication approaches: adapters along with their short comings and new alternatives which are architecturally consistent and use CORBA throughout the radio set. Finally, the paper discusses the capability of SCA operating environments on DSPs and FPGAs.

Evolution and Standardization of SCA
Paniscotti, D. (VP SDR Products of PrismTech Corp., Burlington, Mass); Bickle, J. (Chief Scientist SDR Products of PrismTech Corp., Burlington, Mass)

An effort to commercially standardize the Joint Tactical Radio System’s (JTRS) Software Communications Architecture (SCA) specification was undertaken by the Object Management Group (OMG) several years ago. In December 2005, a new standard known as the Platform Independent Model (PIM) and Platform Specific Model (PSM) for Software Radio Components was adopted by the OMG to serve as an open, commercial standard for the development of Software Defined Radios (SDR) such as the JTRS. This article discusses how this new commercial specification relates to the existing JTRS SCA specification and details the extensions available as part of this specification (such as communication channels and the Unified Modeling Language (UML) Profile for Software Radio (SR). In addition, the article will also focus on specification conformance.

Taking the SCA to New Frontiers
Bernier, S., Belisle, C. (CRC, Ottawa, Ontario, Canada)

The Software Communications Architecture (SCA) has been developed by the US Department of Defence in the late 1990’s to respond to an urgent requirement to standardize the development of their radio equipment. The SCA has now been adopted throughout the world by military organizations as the foundation for their radio development. The SCA however is not, and should not be considered, a military specific architecture. The SCA, and the now available associated development tools, truly form a component-based development architecture, so popular for Business-to-Business applications. There are however still some reluctance in using the SCA outside the military market. In this paper, we first explain how the SCA can be seen as a CBD framework and how it differs from other popular CBD frameworks. We then cover the Myths and Realities of the SCA and demonstrate that the SCA is well suite for not only public safety and commercial radio systems but has applicability in almost any embedded systems, from space to avionics, automobile, radar, test equipment and other electronic devices. We conclude with a few leads as to how the SCA should evolve.

The Software-Defined Radio & Cognitive Radio Inter-Consortia Affiliation
Scoville, M. (L-3 Communications, CS-W, Salt Lake City, UT); Berger, S. (TEM Consulting, LP); Reinhart, R.C. (NASA Glenn Research Center);  Smith, J.E. (Composable Logic)

The evolution of the Software Communications Architecture (SCA) has sprung from a vision for the SDR/CR community to maximize the value of radio interoperability, reusability, and portability, and it has come with a fair share of challenges. The SDR/CR community is splintering or diverging from the initial SCA vision for varied reasons: use case differences, competing standards, heavyweightedness, scoping, cost and profitability, conflicting technological views, misperception, or not being aware of other similar activity. This paper cannot address all these issues, but does seek to address the developing inter-consortia affiliation of consortia that is aiming to collectively review and address standards development pertinent to the SDR/CR community. The focus of this paper, then, is to explore this affiliation, its chemistry and its ongoing developments.

Session 3.1

Radio Environment Map-enabled Situation-aware Cognitive Radio Learning Algorithms
Zhao, Y., J. Gaeddert, J. H. Reed (Bradley Department of Electrical and Computer Engineering, Virginia Tech)

This paper presents an innovative and generic approach to developing cognitive radios (CR) based on the radio environment map (REM). REM is envisioned as an integrated database consisting of multi-domain information, which supports global cross-layer optimization by enabling CR to “look” through various layers. The REM, as a vehicle of network support to CR, can be exploited by the cognitive radio engine (CE) for various cognitive functionalities such as situation awareness, reasoning, learning, planning and decision support. This paper presents the system flow and framework of REM-enabled situation-aware learning algorithms. Simulations demonstrate the effectiveness and efficiency of REM-enabled CR learning algorithms. Furthermore, by sharing information about the radio environment through REM dissemination, the hidden node problem can be mitigated and the secondary users can co-exist with primary users (PUs) with minimal harmful interference. Link level and network level simulations are conducted with MATLAB and NS-2, respectively.

Optimization, Learning, and Decision Making in a Cognitive Engine
Rondeau, T., Le, B., Maldanado, D., MacKenzie, A., Bostian, C. (Center for Wireless Telecommunications, Virginia Tech)

This paper presents further details and results of the cognitive engine developed at the Center for Wireless Telecommunications (CWT) at Virginia Tech. It provides some general design considerations for a cognitive engine as well as specific implementation details of CWT’s cognitive engine. We further present results taken from the operation of the cognitive engine on real radio hardware and show how different sets of objectives can alter the quality of service required by different users and applications.

Cognitive Radio, Spectrum Policy Specification and the Semantic Web
Poston, J.D., Ginsberg, A., Horne, W.D. (The MITRE Corporation, McLean, VA)

No radio, even a cognitive one, is an island unto itself. Government regulations and policy will always exist to varying degrees regardless of cognitive radio technology capabilities. Therefore, a world of cognitive radios will be a world in which policy makers and radio designers will need to share some common understanding of this evolving technology. The Semantic Web—the ongoing World Wide Web Consortium (W3C) initiative to establish standards for machine-usable formal languages, knowledge representations, and methods—offers an avenue for creating formal specifications of radio behaviors. Of particular relevance, the Rule Interchange Format (RIF) working group within the W3C is developing a standard that can accommodate exchange of rules among systems using different rule languages, possibly with differing formal semantics. As a motivating example this paper considers such an approach for the implementation of the Dynamic Frequency Selection (DFS) behavior which avoids radio bands occupied by active radar systems.

Session 3.2

Adaptive Time Allocation for an Environment Where the Next Generation of Low and High Data
Nakashima, O. M., Gordillo, A. C., Kohno, R. (Graduate School of Engineering, Division of Physics, Electrical and Computer Engineering, Yokohama National University, Yokohama, Kanagawa, Japan)

In an environment where the next generations of low and high rate Wireless Personal Area Networks (WPAN) coexist, an Adaptive Slot Allocation approach is proposed in order to improve the network performance. In this paper, the coexistence is achieved by applying the Common Signaling Mode in the coordinators of the network, and the Cognitive Radio concept in the main piconet coordinator. As a result, the main piconet coordinator can be understood by the other coordinators and it is also able to monitor the network traffic. The proposed approach is evaluated by computer simulation and compared to the fixed slot allocation.

An Algorithm to Avoid Interference Between WLAN and WPAN Based on Cognitive Radio Technique
Endo, M., Kohno, R. (Graduate School of Engineering, Division of Physics, Electrical and Computer Engineering, Yokohama National University, Yokohama, Kanagawa, Japan)

With the practical use of UWB, the concept of spectrum sharing has been established. Therefore, the necessity to use the frequency spectrum efficiently arises and the Cognitive Radio concept has been drawing much attention. In an environment where 5GHz-WLAN and UWB-WPAN coexist, the frequency spectrum can be shared efficiently by avoiding interference from WPAN to WLAN employing the Cognitive Radio concept, as it is shown in this paper. In particular, the proposed WLAN base station model, where both Cognitive Radio technique and UWB transmitter are implemented, made interference avoidance possible by an adaptive WPAN transmission power control depending on the amount of interference from WPAN.

An Analysis of Spectrum Management for Coexistence of Fixed and Cognitive Radio Systems
Watanabe, K., Ishibashi, K., Kohno, R. (Graduate School of Engineering, Division of Physics, Electrical and Computer Engineering, Yokohama National University, Yokohama, Kanagawa, Japan)

Recently, the shortage of assignable radio spectrums becomes the serious issue because of appearance of many licensed wireless communications systems. Therefore, cognitive radio technology has gained attention around the world, which maybe aware of its environment and makes occupancy of radio spectrums more efficiently. In this paper, the frequency band between 3.4-4.8GHz is focused on. We consider a coexistence environment of a narrowband radio system, e.g. 4th generation cellular system (4G) and TV broadcasting, and wideband radio system, e.g. ultra wideband (UWB) communication systems. In the frequency band between 3.4-4.8 GHz, UWB systems are required Detect And Avoid (DAA) technology (e.g. [1]). Therefore, in our scenario, narrowband radio system is a traditionally licensed one, i.e., it uses fixed frequency bands. On the other hand, wideband radio system is one with a cognitive radio technology. We introduce two important benchmarks and analyze this communications model using continuance Markov model. Computer simulations have been performed to justify these analytical results. In addition, the design issue of cognitive radio systems is discussed based on these numerical results.

Multi-Band Routing for Ad-hoc Cognitive Radio Networks
Fujii, T., Yamao, Y. (AWCC, The University of Electro-Communications, Tokyo, Japan)

In this paper, we propose a novel multi-band routing method for cognitive radio using ad-hoc networks. The cognitive radio is considered being used for the secondary radio systems under the frequency bands assigned to the primary systems. In order to realize such systems, the method for minimization of giving interference toward the primary systems is required. As one of the solution for the inter-system interference, multi-hop communication networks with small transmit power of each terminal have been considered. In cognitive radio systems, we can use multiple frequency bands for communication. However, these bands are also used by the primary systems so the link quality is often changed. In such situation, the routing is complicated for establishing the reliable multi-hop communication. Therefore, in this paper, we consider the stable routing method suitable for multi-hop cognitive networks with small power by using multi-band for improving the performance of the secondary cognitive networks.

Session 3.3

A Summary of Cognitive Radio Work Performed for the UK Regulator OFCOM
Bradford, J., Burbridge, E., Shukla, A. (QinetiQ, Malvern, UK); Chandler, D. (Multiple Access Communications Ltd, Southampton, UK); Kennett, M. (Red-M, Horsham, UK); Levine, P. (University of Surrey, Guildford, UK); Politis, C. (Ofcom, London, UK)

This paper gives a summary of a year-long study carried out for the UK regulator the Office of Communications (Ofcom) into Cognitive Radio (CR) Technology. This study aimed to answer a number of key questions including:

  • What is CR?
  • What are the benefits and disadvantages of CR?
  • When will CR be deployed?
  • How will CR be used?
  • How will CR be controlled?
  • What are the regulatory issues concerning CR?
  • How might CR behave in a changing radio environment?

To answer some of the key regulatory questions the study included the development of a software based CR demonstrator.

Architecture and Certification Methods for Common Pilot Channel
Mohyeldin, E., J. Luo, R. Falk (Siemens Networks GmbH & Co KG)

Cognitive Pilot Channel or Common Pilot Channel (CPC) is essential in particular for cognitive/reconfigurable radios that support concepts such as flexible spectrum management, dynamic spectrum allocations. It simplifies and speeds up the scanning process for reconfigurable terminals that are not aware of the concurrent spectrum constellation. However management system architecture for Common Pilot Channel (CPC) is required for efficiently managing the CPC information and efficient utilization of resources with reduced signalling overhead. More over, the information provided by CPC has to be correct and up-to-date so that the relying MS can verify its origin and integrity to make the right decision. In this paper we introduce a certification procedure for CPC.

End-to-End Reconfigurability—Management and Control of Adaptive Communication Systems
Bourse, D., Muck, M., Bateman, D., Chengeleroyen, G. (Motorola Labs, France); Simon, O. (France Telecom, France); Alonistioti, N. (University of Athens, Greece); Moessner, K. (University of Surrey, UK); Nicollet, E. (Thales Communications, France); Buracchini, E. (Telecom Italia Lab, Italy); Demestichas, P. (University of Piraeus, Greece)

The End-to-End Reconfigurability (E2R I & II) program develops concepts and solutions to enable, manage and control end-to-end connectivity in B3G heterogeneous environment (cellular, 802.xx, broadcast…). The key objective of the E2R II project is to devise, develop, trial and showcase architectural design of reconfigurable devices and supporting system functions to offer an extensive set of operational choices to the users, application and service providers, operators, manufacturers and regulators in the context of heterogeneous systems. This paper discusses the E2R II research framework and focuses on some of the latest concepts and solutions developed by the consortium.

Optimal Functional Mapping Onto E2R Equipment Hardware Platform
Halimic, M. (Panasonic Broadband Communications Development Laboratory, Wokingham, Berkshire, United Kingdom); Bourse, D. (Motorola Labs, Paris, France); Nicollet, E. (Thales, Paris, France)

In reconfigurable systems very often a situation will occur where an application, unknown at the design time of equipment, will need to be deployed (integrated) onto hardware platform consisting of several and different processors. This deployment should be optimal or at least suboptimal in terms of speed of processing execution and power consumption. In this paper a process of optimal mapping of a software realisation of an application on E P2PR equipment heterogeneous hardware platform is described.

Session 3.4

Evaluation of a Resource Management Method for an Autonomous Adaptive Base Station
Shiba, H., Akabane, K., Matsui, M., Uehara, K. (NTT, Yokosuka-shi, Kanagawa, Japan)

Many wireless systems, such as cellular and wireless LAN systems are now in use, and standardization of many of these wireless systems, is advancing. Also, wireless services, such as telephone and video streaming, have diversified as wireless systems technology has advanced. However, the sudden proliferation of wireless systems and diversification of wireless service causes problems such as unexpected traffic variations, unexpected interference, and lack of space for base stations. To solve these problems, we propose the autonomous adaptive base station (AABS), which changes the function of the base station depending on the availability of the wireless system and the quality of service. To test the efficiency of the proposed method, we evaluated its performance with computer simulations. We also developed the AABS prototype and evaluated its performance. As a result, we were able to demonstrate the effectiveness of the proposed method.

Sensorial Antennas for Radio-Features Extraction in Vehicular Cognitive Applications
Briasco, M., A. F. Cattoni, G. Oliveri, M. Raffetto, C. S. Regazzoni (Department of Biophysical and Electronic Engineering University of Genoa, Italy)

In the last years wireless communication systems attracted commercial interest because of the possibility of developing innovative mobile networks. Cognitive Radios and Smart Antennas are technologies that could allow substantial improvement both for user and system sides. In particular in this paper the attention is focused on the antenna equipment for a Cognitive Base Transceiver Station (CBTS),with high degree of reconfigurability, for an highway vehicular framework.

A Spectrum Sensing Algorithm Based on Distributed Cognitive Models
Cattoni, A.F., I. Minetti, M. Gandetto, C.S. Regazzoni (Department of Biophysical and Electronic Engineering (DIBE) - University of Genova); Niu, R., Varshney, P.K. (Engineering and Computer Science Department (ECS) - Link Hall - Syracuse University)

In the last years, an increasing attention of the communications researchers has been focused on the Cognitive Radio (CR) concept and on its possible supporting technologies and applications. The proposed approach deals the problem of information acquisition and handling for cooperative Cognitive Radio Terminals, in order to perform Spectrum Sensing tasks in a distributed way. The proposed solution is based on Distributed Detection theory supported by a Cognitive Modeling of Terminals.

An Application-Independent Model of the Cognitive Radio Domain
Cook, P. (HYPRES, Inc., Elmsford, NY); Stephen R. Hope (Orange - France Telecom R&D, Bristol, UK)

Cognitive Radio is a technology by which Software Defined Radio functionality is augmented to permit a radio system to autonomously adjust its operations. This capability offers a variety of benefits. This paper proposes a picture of Cognitive Radio that can be adapted to a wide range of radio system considerations. With this model the relationships between system architecture, radio capabilities, application needs, and cognitive network functions can be explored, and the resulting system implications understood. The combination of cognitive capability and the high- performance Software Defined Radio performance made available by the HYPRES Digital RF capability offer significant opportunity for improved communications network capability and performance in the future.

Session 3.5

A Framework for Implementing Cognitive Functionality
Nolan, K., P.D. Sutton, L. E. Doyle (Centre for Telecommunications Value-Chain Research (CTVR), University of Dublin, Trinity College, Ireland); Rondeau T. W., Bostian, C.W. (Virginia Tech, Blacksburg, VA)

A realizable cognitive radio, capable of exploiting the abilities of observation, decision making, learning and acting, requires a combination of a highly-reconfigurable core and a control system implementing the desired cognitive functionality. This paper describes a joint Virginia Tech (VT) and University of Dublin, Trinity College (TCD) collaborative project where the Center for Wireless Telecommunications (CWT), VT has coupled their cognitive engine to a highly-reconfigurable communications stack and controller interface implemented by CTVR, headquartered in TCD. A description of both systems is presented in this paper in addition to an outline of some current and future work planned for this joint collaborative project.

Achieving Dynamic Interoperability of Communication
Lechowicz, L., M. Kokar (Department of Electrical and Computer Engineering, Northeastern University, Boston, MA)

In this paper we investigate the situation in which one of the Cognitive Radio (CR) nodes wants to use an advanced modulation scheme, which is not implemented in the other node. Consequently, it needs to tell the other radio what it means by that modulation scheme. Our approach assumes that there exists a basic ontology and a set of rules shared among the two CRs, as well as a basic communications protocol, which enables the nodes to communicate and share information between them. The node with the advanced modulation scheme may transfer its knowledge (i.e., ontology and rules) to its peer. The other node is using a reasoner and the transferred knowledge in order to construct the algorithm from other functional blocks achieving the interoperability at the modulation scheme level.

Signal Recognition For Cognitive Radios
Le, B., T. Rondeau, D. Maldonado, D. Scaperoth, C. W. Bostian (Virginia Tech)

A cognitive radio (CR) must be aware of its radio environment and able to recognize the waveforms that are present. In this paper, we present a global view of the waveform recognition problem and explore the challenges of designing a general receiver architecture that can recognize various modulated waveforms. We present a design for an adaptive signal classification system and analyze its performance with data from real over-the-air waveforms. The whole system is implemented on a GNU Radio SDR platform and an Anritsu™ Signature signal analyzer.  

The Application of Software Defined Radio in a Cooperative Wireless Network
Kristensen, J., F. Fitzek (Aalborg University, Center for Teleinfrastructure, Aalborg, Denmark)

This article describes the use of Software Defined Radio over the Software Controlled Radio in a cooperative wireless network in an OFDM based downlink scenario. The article argues that although the state of the art of SCR is considered superior with respect to implementation factors such as complexity, cost and efficiency, the SDR offers a degree of flexibility together with the use of cooperative wireless networks that proves a potential to outweigh the disadvantages traditionally associated with SDR implementations.

A Comparison of Alternative Filterbank Multicarrier Methods in Cognitive Radio Systems
Amini, P., R. Kempter, B. Farhang (University of Utah, Salt Lake City, UT)

We introduce and compare three filterbank-based communication methods for cognitive radio systems. In the first method, called Filtered Multitone (FMT), subcarriers are arranged such that adjacent subbands do not overlap. While this makes FMT robust to channel impariments, it leads to considerable losses in bandwidth efficiency. Next, we discuss orthogonal frequency division multiplexing with offset QAM (OFDM-OQAM). OFDM-OQAM operates based on quadrature amplitude modulated (QAM) symbols whose in-phase and quadrature components are time offset by half the symbol period. The third method, which is referred to as cosine modulated multitone (CMT), is based on cosine modulated filterbanks. In CMT, the subcarrier symbols are pulse amplitude and vestigial side-band (VSB) modulated. We present filter designs for all methods and show that OFDM-OQAM offers highest stopband attenuation for a fixed filter length and number of subcarriers.

Session 3.6

Architecture for an Open Source Cognitive Radio
Stuntbeck, E. (Georgia Tech); O'Shea, T. (North Carolina State); Hecker, J (Clemson); T. C. Clancy (Laboratory for Telecommunications Sciences, College Park, MD)

OSCR, a framework for the implementation of a cognitive radio, is designed to facilitate the integration of a cognitive engine with one or more existing Software Communications Architecture (SCA) based radios. It consists of two components: a multiplexer, which acts as the cognitive engine’s point of control for each individual radio within the system, and an SCA resource within each radio, which translates between the radio’s native control API and the OSCR API. OSCR is designed to integrate multiple radios, which may all have differing capabilities, under a single cognitive engine. To demonstrate the usefulness of OSCR, used it to construct a cognitive radio composed of a basic SCA-compliant software radio and a cognitive engine designed to maximize channel capacity by monitoring channel statistics and varying radio parameters. Implementation details and results of experiments with this system are provided.

Spectrum Shaping for Interference Management in Cognitive Radio Networks
Clancy, T.C. (Laboratory for Telecommunications Sciences, US Department of Defense); B.D. Walker (Laboratory for Telecommunications Sciences)

Most dynamic spectrum access research centers on determining the set of frequencies being used by spectrum license holders, taking its converse, and from what remains selecting the optimal subset of spectrum. This, however, assumes unlicensed transmissions have a square power spectrum.

Predictive Dynamic Spectrum AccessClancy, T.C., B.D. Walker (Laboratory for Telecommunications Sciences, US Department of Defense)

This paper explores the idea of predictive dynamic spectrum access (PDSA). Modern spectrum resource allocation research typically divides users into two classes: primary users and secondary users. Primary users own licenses to particular frequency bands and are allowed to use it whenever they wish. Secondary users can reuse the frequencies when they are not being used by a primary user. The goal of PDSA is to gather statistical information about a primary user in an effort to predict when the channel will be idle. This allows us to better plan secondary use of the spectrum without the cooperation of the primary user. We explore two approaches to PDSA in this paper. The first uses cyclostationary detection on the primary users’ channel access pattern to determine expected channel idle times. These techniques are simulated with both TDMA and CSMA networks. The second briefly examines the use of Hidden Markov Models (HMMs) for use in PDSA.

SDR for Opportunistic Use of UMTS Licensed Bands
Marques, P., A. Gameiro (Universidade de Aveiro, Instituto de Telecomunicações, DETUA, Aveiro, Portugal), L. Doyle (Centre for Telecommunications Value-chain Research, Trinity College, University of Dublin, Ireland)

The UMTS radio frequency spectrum is a highly expensive commodity. While the UMTS standards make very efficient use of the allocated bands there is however opportunity for further advancements. This paper focuses on opportunistic use of the UMTS spectrum as a means of ensuring that the maximum possible use of this valuable resource is made. In particular we focus on the local detection of UMTS TDD signals through the use of a cyclostationary feature detector. Simulation results for the use of this detector in the presence of multipath propagation and shadowing effects are presented.

Principles of Cognitive Network Teamwork
Nolan, K., Doyle, L. (Centre for Telecommunications Value-Chain Research (CTVR), University of Dublin, Trinity College, Rep. of Ireland)

This paper looks ahead at the future of wireless communications systems that can combine their resources and capabilities in order to enhance their overall ability to collect and convey information. Cognitive network teamwork has significant potential in the development of new public-safety, entertainment and military applications. Specifically, descriptions of the principles of formation, coordination and management of an effective cognitive network team, and an exploration of the key processes involved are presented. Also described in this paper are the different roles that an individual cognitive node can adopt within the team, how a cognitive network team can benefit from the rewards of successful teamwork, and how inevitable change in membership and network topology can be handled. Finally, a relevant example scenario is outlined in order to suggest a suitable context for these principles.

Session 4.1

SDR Considerations for Public Safety
Taylor, R. (M/A-COM Wireless Systems, Lynchburg, VA)

This paper discusses tradeoffs in designing a radio for meeting public safety requirements. In particular, the following topics are covered:

• Typical public safety requirements (including durability, environmental, features, RF specifications, radio coverage, regulatory, and standards) that tend to be key drivers for the size, weight, power consumption, and/or cost of the radio.

• Design tradeoffs for the radio, including identification of necessary SDR technology improvements for realizing higher tier SDR radio designs. The primary focus is the handheld portable radio, which tends to be the most challenging design of the various types of radios used in a public safety system.

A Wireless GPS Wristwatch Tracking Solution
Brown, A., Griesbach, J., Boult, T. (NAVSYS Corporation, Colorado Springs, Colorado), Brown, P. (NAVSYS Ltd, Edinburgh, Scotland, UK)

The TIDGET® is a low power GPS tracking device that is being developed by NAVSYS under contract to the US Army. This TIDGET tracking device uses a client/server approach to send raw GPS sampled data to the TIDGET Location Server through a wireless data link. The TIDGET Location Server is based on a Software Defined Radio architecture and uses a GPS waveform application to process the GPS sampled data and compute a position fix for the device. The TIDGET is packaged in a wristwatch form factor with a ZigBee data link for ultra low power operation. The TIDGET tracking device can operate for a period of over 30 days from the wristwatch battery. This paper will outline the concept of operations and the TIDGET system architecture, as well as highlight the latest test results showing the system performance.

A VHF/UHF/Cellular/VOIP SMART Radio Bridge for Public Safety Conflict and Disaster Manage
Reichart, S. (Air Force Research Laboratory), B. Youmans (PAR-Rome Research Corp.)

This paper describes a demonstration of an user-friendly, software definable, “smart” radio in a public safety, conflict and disaster management application. This is the second in a series of demonstrations which will incrementally assure the end users of the realizability of fielded “software programmable radios” (i.e. Joint Tactical Radio System (JTRS)). A “smart” radio monitoring a transmission must recognize the type of waveform received, including frequencies, modulation, data type (voice, data, sensor data) and have the ability to automatically reconfigure itself to communicate. A “smart” radio must also be able to sense the electromagnetic environment and make changes to maximize bandwidth, Quality of Service (QoS) and maintain security. A “smart” radio will enable more efficient communications by allowing the radio to choose the correct waveform, the correct data rate, the correct compression algorithm, the correct RF power, and the correct transmission path. Decisions have to be made based on many criteria including: data/voice priorities, low probability of intercept vs. anti jam, atmospheric conditions and hardware resource availability.

Session 4.2

The SDR Approach in a Wideband Airborne Communication Node
Schiel, J-C, F. Montaigne, G. Philippe (EADS DS, St Quentin en Yvelines, France)

The Airborne Communication Node (ACN) demonstrator has been developed by EADS for the French MoD (DGA / SPOTI) in order to enhance telecommunication and network capabilities, providing up to 40 Mbps capacity on the IP standard, for both civilian and military applications (Network Centric Operations concept). It is based on an airborne node which covers a 100km diameter area for up to 10 ground mobile gateways. The ambitious specifications for the ACN demonstrator such as the very high data rate combining WCDMA and TurboCodes, a low latency and a high robustness in electronic warfare environment and the short development time conducted to use a SDR approach. The hardware part is based on a platform with an open and modular architecture and is completely reconfigurable: it is composed of COTS products interconnected through a very high speed network ring. On the software side new MBD and SoC techniques have been tested successfully with a direct result of a great gain in development time and even more in the validation process. The SDR approach combining a modular and flexible platform and a MBD plus SoC methodology has been very efficient to build the ACN demonstrator. The WCDMA waveform demonstrates then its greatest potential and gives to the ACN demonstrator an outstanding performance with double IP capacity compared with the specifications.

From the Use of Multi-User Detection Algorithms in a WideBand Airborne Communication Node
Schiel, J-C, F. Montaigne, G. Philippe (EADS DS, St Quentin en Yvelines, France)

The Airborne Communication Node (ACN) demonstrator has been developed by EADS for the French MoD (DGA/SPOTI) in order to enhance telecommunication and network capabilities, providing up to 40 Mbps capacity on the IP standard, for both civilian and military applications (Network Centric Operations concept). The ACN has been developed considering the fact that a SDR platform should support more than multi-mode and multi-standard communications but should also support “reconfiguration services” like QoS, FEC codes, detection... Nevertheless, no special detection schemes/services have been implemented at the present time but studies have been done concerning the impact of Multi-User Detection (MUD) algorithms on the system. This paper shows a significant capacity impact that could have MUD algorithms for the future Airborne Communication Node. The demonstrator, upgraded with these algorithms will offer a higher data rate capability for wireless IP network over a wide coverage area and could be a part of future Network Centric Operations.

Performance Analysis of Polling MAC’s for Exo-Atmospheric Wireless Sensor Network (paper not available)
McDaniel, B., P. Sholander, K. Smart (Sandia National Laboratories, Albuquerque NM, USA); Matt Oswald (Smith Medical Waukesha, WI)

In wireless sensor networks a time-variant communications channel can have adverse effects on a system’s performance. Media Access Control (MAC) functionality that addresses the time-varying channel environment, in order to provide reliable data transfer within the network, is essential to ensure mission success. One such network where this becomes apparent is the “exo-atmospheric” network. The exo-atmospheric network is composed of nodes in space connected in a star topology where data transfer within the network is coordinated using a polling MAC. The outlying nodes and the center node (“access point” or “AP”) may have different antenna patterns (i.e. dipole or patch), arbitrary time-variant attitudes, and different trajectories. Though the propagation loss may be R2, the rotation of the nodes coupled with non-isotropic antenna patterns introduces a fading channel between nodes and the access point. Additionally, the network must meet certain prescribed reliability, throughput, and resource requirements. As such this paper presents a performance analysis of using two different polling MAC’s for an exo-atmoshperic network. The results show the regions where proposed polling schemes – namely Channel Aware Round robin (CARR) and Channel and Congestion Aware (CCA) – will and will not successfully balance given sets of constraints for particular sets of node and network attributes (time- variant attitudes, trajectories, data rates, and antenna patterns).

Integrated GPS/INS/Star-Tracker Space Navigation System Using a Software Defined Radio
Brown, A., B. Mathews, D. Nguyen (NAVSYS Corporation, Colorado Springs, Colorado)

NAVSYS Corporation has developed a design and prototype of a flexible, high performance, miniaturized, space-based Software GPS Receiver (SSGR) based on a Software Defined Radio (SDR) architecture that optimally combines GPS, INS, and star-tracker inputs to provide a flexible, integrated precision navigation and attitude determination solution for space applications including LEO, HEO and GEO missions. Working jointly with Microcosm, Inc., we have prototyped and tested this capability with a miniaturized star-tracker developed specifically for microsatellite applications. In this paper we present a system design, analysis, and test results for the integrated SSGR navigation system. The filter design for the optimal integration of GPS, INS, and star-tracker measurements are presented along with simulation results that show predicted performance. As part of the test and simulation effort, the NAVSYS Advanced GPS Hybrid Simulation (AGHS) capability was used to simulate the space environment. Receiver test results using the AGHS will be presented to validate performance predictions and demonstrate the benefits of the combined GPS, INS, and star-tracker approach.

Strategic Adaptation of SCA for STRS
Quinn, T., Kacpura, T. (ZIN Technologies/NASA GRC, Brook Park, Ohio)

The Space Telecommunication Radio System (STRS) architecture is being developed to provide a standard framework for future NASA space radios with greater degrees of interoperability and flexibility to meet new mission requirements. The space environment imposes unique operational requirements with restrictive size, weight, and power constraints that are significantly smaller than terrestrial-based military communication systems. With the harsh radiation environment of space, the computing and processing resources are typically one or two generations behind current terrestrial technologies. Despite these differences, there are elements of the SCA that can be adapted to facilitate the design and implementation of the STRS architecture.

Session 4.3

Random Packet CDMA: Reducing Delay and Increasing Throughput of WLAN Systems
Kempter, R., B. Farhang-Boroujeny (Department of Electrical and Computer Engineering, University of Utah)

We revisit Random Packet Code Division Multiple Access (RP-CDMA), a recently proposed Physical/MAC layer scheme for wireless CDMA networks. We revise earlier results by adopting a more realistic Spread Aloha model for header transmission and packet sizes with distributions typical for Internet2 traffic. Thanks to timing recovery in the RP-CDMA header and greatly reduced packet collision probability, unlike Spread Aloha, RP-CDMA enables the use of multiuser receivers for data detection. We simulate the throughput characteristics of RP-CDMA with the matched filter, the decorrelator, the MMSE and partitioned spreading demodulation detection and compare performance to Spread Aloha in a base station centric network.

Novel Approach for Data Piggybacking in Manet
Langguth, T., A. Bässler, E. Haas, H. Schober, T. Nicolay (Rohde & Schwarz GmbH & Co. KG)

Effective Medium Access Control (MAC) is an important issue for bandwidth efficient Mobile Ad-hoc Networks (MANET) as it coordinates the distributed access to the shared radio channel. Due to the unreliable transmission channels in wireless environments acknowledgement messages are often used to inform the transmitter about the successful reception of a data message. This acknowledgement based handshaking procedure consumes significant parts of the scarce bandwidth resource. In order to provide higher MANET transmission performance the approach presented in this paper reduces the waste of resources by minimizing the number of channel accesses and required acknowledgements. We propose an approach which achieves this objective by piggybacking the data messages on the acknowledgement in a multi-hopping environment. Instead of a pure acknowledgement the piggybacked data message is transmitted again by the in-between nodes. In a MANET this piggybacked data message implicitly informs the originator about the successful receipt of the message and transmits the data at least one hop further. In our approach the transmission of pure acknowledgement messages is avoided and the amount of overhead for the acknowledgement is reduced. In addition by piggybacking the data packet on the acknowledgement, the data packet is transmitted one hop further. The data is transmitted at least two hops wide within one channel access cycle. By using additional piggybacked acknowledgements the data packet can be transmitted multiple hops in one channel access cycle.

Software Implementation of 802.11a blocks on Sandblaster DSP
Ramadurai, V., Jinturkar, S., Agarwal, S., Moudgill, M., Glossner, J. (Sandbridge Technologies, White Plains, NY)

In this paper, we describe the design and implementation of software blocks for 802.11a receiver on Sandblaster DSP. A software solution provides high reusability, low cost and short development time when compared to dedicated hardware solutions. A significant challenge faced is in achieving high throughput and stringent latency requirements. 802.11a is an IEEE standard that operates in the 5GHz band using Orthogonal Frequency Division Multiplexing (OFDM). OFDM divides a data signal across 48 separate sub-carriers to provide higher data rates and minimize the multi-path propagation effects. The standard supports multiple data rates from 6Mbps to 54Mbps and involves high computational complexity. The steady state 802.11a receiver consists of an FFT and removing pilot/DC, demapper, deinterleaver, depuncture, FEC decoder and CRC. We explore techniques for optimizing individual blocks and also combining multiple blocks to increase the overall performance and to meet real time throughput and latency requirements. There is significant data movement between individual blocks like FFT, demapper, deinterleaver and depuncture and we explain how multiple blocks could be coupled to significantly reduce the instruction cycle count as well as data transfers. Traditional software deinterleavers have been implemented using table look-ups. We explain how table- look ups could be merged with other compute intensive and data intensive blocks like demapper and depuncturer thereby speeding up the entire system. Instead of optimizing blocks for a specific data rate, we propose optimizations that could be exploited for any data rate specified by the 802.11a standard.

An Overview of SDR Opportunities and Challenges in Telematics
Alsliety, M. (Harman/Becker Automotive Systems, Farmington Hills, Michigan)

Since the first introduction of a combined telecommunications and informatics platform, known as telematics, into automobiles more wireless and location technologies have been integrated into automobiles. Original Equipment Manufacturers (OEMs) are faced with new technical and integration challenges as a result of automobiles becoming farms of wireless technologies. In addition, OEMs are under the pressure to reduce telematics products cost and time-to-market in order to stay competitive. Therefore, the demand for concepts like Software Defined Radio (SDR) is growing. SDR has the potential to realize flexible, multi-band, multi-standard embedded telematics products that can be reprogrammed over the air. This paper provides an overview of the automotive telematics market, services, and key hardware functional blocks. SDR opportunities, challenges, tiers, and main blocks in telematics are addressed as well.

Software Defined Radio Architectures for Mobile Commercial Applications (paper not available)
Org, E., R. J. Cyr, G. Dawe, J. Kilpatrick (BitWave Semiconductor, Lowell, Massachusetts, USA)

The commercial application of Software Defined Radio (SDR) has been a complex endeavor. Even as SDR solutions for wireless applications have emerged in the market, the power and performance requirements of mobile devices continued outpace SDR’s development. While SDR solutions appeared to address the growth in allocated spectrum and protocols with a flexible solution, those existing SDR solutions were unable to support the small form factor and low cost requirements of the portable device industry. Designers of multimode devices have had limited choices in multi-band/multi-protocol radio architectures. Designers could either switch between a set of single function transceivers implemented on a single die or in a single package, or designers could implement what’s been considered the traditional SDR approach, a high bit rate – high sampling frequency analog to digital converter (ADC) immediately following the antenna with sophisticated high performance DSP processing. Design choices were limited. Designers could choose either a fixed purpose multimode radio with limited flexibility and lower power consumption or a more flexible SDR solution with higher power consumption. The higher power required when using a wide band ADC is one of the primary reasons why SDR solutions have been successful in infrastructure but not mobile solutions. Infrastructure SDR equipment with less demanding power constraints has already been shipping commercially for some time. The Softransceiver™ RFIC architecture addresses the growing need for reconfigurable multimode battery operated devices in the commercial marketplace. This architecture successfully blends the performance of analog transceivers with the flexibility of digital programmable circuits. BitWave Semiconductor redesigned transceiver functional blocks to enable dynamically reconfigurable circuits, implemented CMOS fab processes which support low cost and high yield silicon production and chose a largely digital architecture to allow for a highly scalable implementation. Software Defined Reconfigurability is thus achieved while also hitting commercial wireless benchmarks for power, performance and cost.

Session 4.4

Tackling a SDR Project as a Last Year Project in an Engineering Curriculum
Houle, A., M. Bianchi, S. Dancause, S. Gingras, N. Lévesque, N. Madjlessi, F. Pham (Université de Sherbrooke, Sherbrooke (Qc), Canada), C. Belisle (Communications Research Centre Canada, Ottawa (On), Canada)

Students enrolled in the electrical engineering and computer engineering programs at Université de Sherbrooke have to undertake a mandatory last year design project. Teams of six to eight students work on these projects at a pace of twenty hours per week per student, for a period of eight months (winter and fall semesters). Considering this workforce, design projects of respectable size can be undertaken. We present one such design project that aims at developing an SDR platform that will receive in AM and FM commercial bands while being able to transmit and receive in the FRS band. We explain how this last year design project fits in our engineering curriculum, present the main steps of the project, describe the architecture of the prototype and explain the technical challenges encountered. We also aim at bringing the prototype to the conference for a live demonstration and to report the prototype performance. We hope that this presentation will trigger ideas for other universities to adopt a similar approach for their telecommunication specialty and will be a first step to create an infrastructure within the universities to participate to the SDR Forum Radio Challenge.

Cognitive Radio: Value Creation and Value Migration
Nolan, K. (Centre for Telecommunications Value-Chain Research (CTVR), University of Dublin, Trinity College, Rep. of Ireland), E. Ambrose (CTVR, National Institute of Technology Management, University College Dublin, Rep. of Ireland), L.E. Doyle (CTVR, University of Dublin, Trinity College, Rep. of Ireland)

This paper develops the concept of a telecommunications value-chain and explores the many ways in which the value- chain can be altered by reconfigurable software-defined radios, cognitive radios and cognitive networks. In cognitive radio terms, value creation can occur through increased functionality of devices, such as the always-connected-anywhere feature of a cognitive radio for example. This value can migrate within the value-chain according the context in which the device is operating in, and the time-varying objectives of the system. However, this newly created value is not easily captured and the dynamics of value migration within the value chain are complex and difficult to manage. The design, test, manufacture, certification, maintenance and evolution of software-defined radio and cognitive radios, and the subsequent implications for the value-chain are explored. In addition, a scenario involving a network of cognitive radios and the subsequent impact on the value-chain will be investigated.

End-to-End Reconfigurability Convergence of Unified Business Model (UBM)
Bourse, D., Muck, M. (Motorola, France); Moessner, K. (University of Surrey, United Kingdom); Ballon, P., Delaere, S. (Vrije Universiteit Brussel, Belgium); Stamatelatos, M., Kominaki, K. (University of Athens)

The system research in ER II supports the project by bringing together business and technology aspects and by showing opportunities of how reconfigurable technology and systems may be deployed in a commercially viable and sustainable way. This paper brings together the regulatory and responsibility aspects that come along with reconfigurability with the possible economic exploitation. The approach documented implements the convergence between the E2R II Unified Business Model (UBM) and the E2R II Responsibility Chain (RC) concept.  

Session 4.5

Continuous Automated Testing of SDR Software
Nimmer, J., N. Martin, B. Fallik, J. Chapin; Vanu

Software testing is vital for the success of any SDR engineering organization, given the complexity and reliability requirements of radio communications. At Vanu, Inc. all waveforms under development are tested 24 hours a day by an automated system. The test system has been running continuously since 2002. In that time it has evolved in sophistication and become an integral part of the company’s software engineering methodology.

A Framework for developing SCA components 

Burkhardt, S., T. Bleichner (Rohde & Schwarz, Munich, Germany)

Developing SCA resources and devices for Software Defined Radios requires to take care of a large number of requirements regarding the components as such (SCA resources and devices). Code generators producing the framework code often lead to a large number of source code lines, many of which are duplicated in many resources. In our approach, we are developing a set of standardized building blocks which implement the given SCA interfaces as well as data streaming and control interfaces from the API supplement. Also, internal interfaces which are required for the integration of waveform algorithms are provided. In order to develop an SCA component employing the proposed set of building blocks, the developers have to customize the internal interface of the components and select the corresponding building blocks for the external interfaces from the set. Besides this, the developer merely has to define names and types of the component’s properties and the algorithms inside the component. If new interfaces are required, templates are provided which allow to include these interfaces into the set. Consequently, every SCA component (resource or device) can be built from these building blocks. Only little additional code is necessary to connect the components to the actual assembly. In contrast to currently existing code generation technologies we do not just generate the code from templates. We provide a resource and device framework in the form of libraries, which cover major common functionality of the components. In the next step, we plan to extend the approach by incorporating our component framework into an existing SCA tool, so that it automatically generates the connecting code and makes efficient use of the component framework.

Accelerated Simulation of Communication Waveforms using the MATLAB Distributed Computing
Garvey, B. (General Dynamics C4 Systems, Scottsdale, AZ)

Developing new communication algorithms and waveforms typically requires significant engineering effort and extensive, time-consuming simulations. MATLAB and Simulink are often used for this type of work. Although these tools have proven valuable in developing and simulating waveforms, designs of even modest complexity can require long simulation times. The Mathworks now offers a distributed computing solution, the MATLAB Distributed Computing Toolbox, which has the potential to address this problem. This paper presents a methodology and algorithm for significantly accelerating the simulation of communication waveforms using the MATLAB Distributed Computing Toolbox running on a computer cluster. In the proposed approach, a single Monte Carlo simulation is broken into numerous smaller (shorter) Monte Carlo simulations, running on multiple computers, and the results averaged together to create the final answer. The parallel Monte Carlo approach is already being used by researchers and engineers in other technology areas [1, 2]. A MATLAB m-file, dc_sim.m, has been developed to implement this approach and is described in this paper. The proposed algorithm is general purpose in nature which makes it easier to add additional computers to the cluster if desired.

Session 4.6

A High Assurance Wireless Computing System (HAWCS) For SDR
Murotake, D., A. Martin (SCA Technica, Inc. Nashua NH)

In 2004 and 2005, the authors provided details of wireless network threats discovered during software defined radio (SDR) threat analysis study that exposed a potentially serious flaw in the security architecture of SDR. The reconfigurable radio terminal, and the host to which it is attached, is potentially vulnerable both to exploitation and malicious reconfiguration as a result of “proximity wireless” and Internet based network attacks. These vulnerabilities extend to mobile computing devices with embedded wireless and/or wired network interfaces including wireless laptops, PDAs and Smart Phones. During the past two years, the industry has responded rapidly. The Joint Tactical Radio System (JTRS) issued Change Proposal CP295, “Exposed Black Side”, in January 2005. The United States Government altered certain procurement specifications for SDR and global networks by December 2005. The Software Defined Radio Forum considered these threats during preparation of security related Recommendations in 2006.

Rapid Prototyping for SCA
Hermeling, M. (Zeligsoft Inc; Gatineau, QC, Canada), J. Rice (Virginia Tech)

Mathematical modeling tools for the signal processing chain are commonplace in the toolboxes of SDR (Software Defined Radio) developers. Typically, engineers model the physical layer of the waveform with these tools. Once the engineer is satisfied with the simulated behavior, the model is manually translated into high-level source code for DSP, FPGA, and GPP targets. The source code then is extended to behave as required with respect to the SCA standard. Manual workflows are the norm in the development of SCA based Software Defined Radio. In this paper, we describe the work done by a consortium of BAE Systems, Virginia Tech University, The MathWorks, Xilinx, and Zeligsoft to look at automating this development process. We look at rapid prototyping of waveforms through model-based design of both signal processing and component-based functionality. We discuss how the different models are related and how they can be used for automatic generation of required artifacts.

A Case-Study comparing tradition to model-based Rapid Development of SDR Waveforms -Part II
Haessig, D., R. Regis (BAE Systems, NES, Wayne NJ), M. Hermeling (Zeligsoft)

In [1], the authors compare traditional RTL design flow to that of model-based design, applying both to a common problem – implementation of the physical layer of SATCOM waveform MIL-STD-188-165a. They report a 10:1 improvement in productivity in the areas of algorithm simulation testing, code generation, and waveform integration. That study carried the comparison through to the point of hardware-in-the-loop testing, each design implemented autonomously in a single FPGA node, looping back the transmit signal to the receiver. In the current paper we describe an effort to complete the waveform implementation thru interoperability with another node, a COTS modem. Finally, a paradigm for creating SCA-compliant FPGA-hosted components via auto-code generation is proposed, and the impact and implications that this can have on code reuse is discussed.

Session 5.1

The Use of the SCA For Sonar and Underwater Communications Applications
Jones, E. (SEA Group Ltd, Bath, UK)

The Software Communications Architecture (SCA) is an Open Standard for communications equipment developed for the Joint Tactical Radio System (JTRS) program. Although the architecture is primarily aimed at software defined radio applications, the technique is equally applicable to sonar and underwater communications systems, promising to take the benefits of JTRS in terms of development, support and openness to the underwater domain. This paper discusses the application of Software Defined Radio techniques to Sonar and Underwater Communication Applications.

Performance Evaluation of the Software Download Procedure Duration
Trogolo, A., P. Goria, E.Buraacchini (Telecom Italia, Turin, Italy)

The last years saw the development and the deployment of a plethora of different air interface standards all over the world. In this scenario, a common desire to produce a user terminal with a high degree of flexibility and able to work with multi-radio interface standards was envisaged. The implementation of such a fully re-configurable terminal implies the need for downloading various software modules from the Network to the Terminal in order to update/upgrade software and hardware entities in the handset, thus enabling the terminal to work with a new air interface. The aim of this paper is to evaluate the software download procedure performance, in order to understand which are the main aspects influencing it and how to increase the efficiency of allocated resources and download duration.

E²R commercial SDR Equipments: from advanced research to proof-of-concept and Standard
Nicollet, E. (Thales Communications, Paris, France)

Reconfigurable Radio Equipments are key enablers of End- to-End Reconfigurability. They rely on two key enabling technologies: Software Defined Radio (SDR) and Cognitive Radio (CR), on top of flexible RAT (Radio Access Technique) processing chains. E²R WP4 (Work Package 4) is evaluating the impacts of SDR and CR capabilities introduction on radio equipments architecture. Both sides of the radio media are considered, i.e. smart terminals and flexible base stations. WP4 is progressing towards a unified architecture description taking into account all the dimensions imposed by SDR, CR and flexible RAT processing. A particular attention is paid on the robustness constraints of highly constrained embedded equipments and their associated security requirements. This paper presents the refined work assumptions of E2R II WP4 (as of Spring 2006), as well the collective activities conducted in the work-package. A specific focus is being set on the proof-of-concept and standardization objectives.  

JTRS Infrastructure Architecture and Standards
Stephens, D. (CommLargo, Inc.: St. Petersburg, FL); B. Salisbury (Space and Naval Warfare Systems Center: San Diego, CA), K Richardson (The MITRE Corporation: McLean, VA)

In March 2005, the USD (AT&L) appointed a Joint Program Executive Officer (JPEO) for JTRS to provide an overarching management structure across all Department of Defense (DoD) JTRS programs. The JPEO JTRS was given full directive authority for all waveform, radio, and common ancillary equipment development, performance and design specifications, standards for operation of the system, and JTRS systems engineering. The JTRS program objective is to develop and integrate a family of Software Defined Radios which maximize software and hardware commonality and reusability. To achieve this goal, the JPEO is facilitating the establishment of a standardized infrastructure for Joint Tactical Radio (JTR) sets.

Session 5.2

Novel Antenna Topologies for SDR
Pilcher, M., Thompson, T.; Southwest Research Institute

Southwest Research Institute® has developed and demonstrated two new antenna topologies with excellent characteristics for SDR applications. The stub-shorted cylindrical meander is an electrically small, narrow-band, but electrically tunable antenna and the tapered-aperture small helix (TASH) is a mechanically sturdy, decade- bandwidth antenna with little sensitivity to an imperfect ground plane. These patented topologies have application to standard mobile radio, but can be particularly beneficial to band-selectable SDRs.

Small Chip Antenna for PHS Band Mobile Phone Handset
Kang, N., H. Kim (Dept. of Electrical & Computer Eng., Hanyong University, Seoul, Korea)

In this paper, we propose a chip type antenna for PHS band, which can be applied to actual mobile phone. The minimization of the antenna was realized by using meander structure and loop inductor, which make lower resonant frequency than general PIFA antennas at same size. This antenna has lines on FR-4 PCB of dielectric constant = 4.4 [1] [2]. The antenna characteristic is analyzed depending on tuning components, the size of supporting dielectric portion and its permittivity by using the commercial software HFSS 3-D EM simulator.

A Design of the Multi-Band Small Chip Antenna Using the Branch Structure for Mobile Phones
Kim, M., D. Shin, S. Park, H. Kim (Dept. of Electrical & Computer Eng., Hanyang University, Seoul, Korea)

In this paper, we propose the antenna which has a wideband operation (GSM850, EGSM, DCS1800, USPCS, WCDMA). This antenna is designed by using a meander branch structure which has via and lines on FR- 4(εr=4.4) PCB. The antenna was designed by the commercial software HFSS 3-D EM simulator. The designed antennas are manufactured by PCB processing, and measured by using the network analyzer and test chamber. The antennas with the dimension of 8mm width, 20mm height and 3.2mm thickness, are applied as internal antennas for wideband cell phones. Its size was minimized so that it can be mounted in cell-phones.

A Design of Miniaturized Built-in Penta-Band Chip Antenna for GSM850
Choi, H., D. Shin, M. Kim, H. Kim (Dept. of Electrical & Computer Eng, Hanyang Universtiy, Seoul, Korea)

The novel internal monopole chip antenna of penta-band operation for GSM850/GSM900/DCS/USPCS/WCDMA bands for mobile phones is proposed. This antenna occupies a small volume 8×3.2×20 mm3 and is suitable to be embedded in a mobile phone as an internal antenna. Also, this antenna is designed to be installed at the newest mobile handset whose size is 40×93 mm2. The minimization of this antenna was realized by using spiral line structure and meander line structure on FR-4 of dielectric permittivity r ε= 4.4. The proposed antenna is SMD type to be easily installed in the practical mobile handset. Also we use PCB technology which can allow this antenna to be produced massively with low cost. We can get the wideband operation in the upper band by overlapping high order resonances. The measured bandwidth of this antenna (VSWR >3) is 150 MHz (1030 – 1180 MHz) in the lower band and 650 MHz (1760 – 2410 MHz) in higher band. The antenna has been designed by a commercial software HFSS.

Dynamic Radio Location Under Extreme Multipath Conditions
Egg, B. (Cubic Defense Applications & SDSU, San Diego, CA), f. harris (San Diego State University), C. Dick (Xilinx, Inc., San Jose, CA)

Dynamic Radio Location (DRL) uses propagating radio waves to estimate point to point distance and relative angle—sufficient information to calculate a position vector [x y z]. In unobstructed environments free of RF reflectors and diffractors, positioning is reliable, continuous, and computationally light. However, highly cluttered channels speckled with ray reflectors and diffractors, generate multiple paths (multipath) forming homogenous composites of phase shifted and amplitude modified rays. We investigate this problem from a brief theoretical approach, enhanced with graphical illustrations to develop an insightful view of the challenges, and analyze current solutions and limitations. Finally, we assert that a new solution is available due to a recent communications development that performs well in multi-path environments- MIMO radio architectures, utilizing Alamounti’s space-time coding. In addition, micro technology advancements have provided us with highly accurate, yet low power and small inertial measuring accelerometers—MEMs technology. These technologies are limited on their own, and require significant computational power to integrate them together—a task uniquely satisfied via the powerful Virtex-5 FPGA.

The Wireless Innovation Forum does not endorse or recommend the content of any of papers and presentations contained within these proceedings, rather these items are listed strictly as a service for the community. The information and materials contained in these proceedings are provided "as is" without warranty of any kind, either express or implied, including without limitation, any warranty of accuracy, adequacy or completeness of the information and materials, title, non-infringement of third party rights, merchantability, fitness for a particular purpose, etc.